Computer Science Professors Team Up with Intel for DARPA’s Ubiquitous High Performance Computing Challenge

Two University of Illinois computer science professors are teaming up with Intel Corporation in a new $49 million effort as part of DARPA’s Ubiquitous High Performance Computing challenge to create the hardware and software of a new extreme-scale computing architecture.  Professors David Padua and Josep Torrellas have been awarded $1.7 million towards their research efforts on the DARPA UHPC challenge.   Torrellas will participate in the design of the architecture, while Padua will contribute in the design of compilers and programming languages.

DARPA's Ubiquitous High Performance Computing (UHPC) program seeks "to create an innovative, revolutionary new generation of computing systems that overcomes the limitations of the current evolutionary approach," the agency said in a statement.

“Extreme scale computing represents both an enormous challenge and an enormous opportunity to rethink the way we’ve been building computing systems since the advent of the microprocessor,” said Justin Rattner, Intel’s Chief Technology Officer. “We’ve had a relatively easy ride getting to where we are, but the road ahead is going to be much more difficult. Frugal doesn’t begin to capture how efficient we’ll have to be in order to meet DARPA’s objectives for UHPC.”

The Intel-lead UHPC team intends to develop new circuit topologies, new chip and system architectures, and new programming techniques to reduce the amount of energy required per computation by between 100x and 1000x compared to today’s computing systems. Such dramatic reduction in energy consumption will allow these future systems to take full advantage of the increasing transistor budgets afforded by the steady advances in Moore’s Law.

As part of the UHPC effort, Torrellas will be revisiting the compute and memory system architecture that will dramatically optimize energy efficiency.  He plans to investigate new architectures for fast synchronization and communication, memory hierarchy organizations, aggressive techniques for power and resiliency management, and in-memory state versioning, among other advances.

Padua will participate in the design of programming systems that facilitate coding and enable automatic program optimization. Very high level APIs and compiler strategies that support static and dynamic optimization characterize the programming system of extreme-scale computer systems. The multiple optimization dimensions that must be addressed in extreme-scale computing -- including execution speed, energy efficiency, and resiliency -- complicate tuning and demand the support of novel and sophisticated compiler strategies.

Torrellas, Padua, and the rest of the research team will leverage their experiences on other Intel prototypes, like the Polaris 80-core chip and the new 48-core single chip Cloud computer (codenamed Rock Creek) in order to prototype the UHPC system with cutting-edge hardware.  

 “If we are successful in developing the extreme-scale technology anticipated by the UHPC program, 100GF would consume a mere two watts of power or even less,” said Rattner in a blog posting.

Shekhar Borkar, who is the head of the Academic Research Office at Intel Labs and leads this UHPC effort, said "we are excited to partner with world class researchers from the University of Illinois.  The experience and expertise of Profs. David Padua and Josep Torrellas in programming systems and architecture is much needed for this ambitious research project."