Reading List (tentative): Fall 2005 (CS 598, Section CZ)

Background:

P1: The Microarchitecture of Superscalar Processors, Smith and Sohi.

X0: Overcoming the Challenges of Feedback-Directed Optimization, Smith.

Emulation & Feedback-directed Optimizations:

P2: FX!32: a Profile-Directed Binary Translator, Chernoff, et al.

X1: Dynamo: A Transparent Dynamic Optimization System

P3: Efficient path profiling, Ball and Larus
X2: Edge profiling versus path profiling: The showdown, T. Ball, P. Mataga, and M. Sagiv.

X3: The Superblock: An Effective Technique for VLIW and Superscalar Compilation, Hwu, et al.

P4: Optimizing Alpha Executables on Windows NT with Spike, Cohn, Goodwin, and Lowney.

P9: Pin: Building Customized Program Analysis Tools with Dynamic Instrumentation, Luk, et al.

High-Level Language (HLL) Virtual Machines

P5: Thin Locks: Featherweight Synchronization for Java, Bacon, et al.
Retrospective: Thin Locks, Bacon, et al.

P6: A Generational Mostly-Concurrent Garbage Collector, Detlefs and Printezis.

P7: Escape Analysis for Java, Choi, et al.

P8: Design, Implementation, and Evaluation of Adaptive Recompilation with On-Stack Replacement, Fink and Qian

X4: The Java HotSpot Server Compiler, Paleczny, Vick, and Click.

X5: Adaptive optimization in the Jalapeno JVM

X5.5: A Framework for Reducing the Cost of Instrumented Code, Arnold and Ryder

Program Profiling:

X6: Sampling Techniques, William Cochran, John Wiley & Sons; ; 3rd edition (July 1977), ISBN: 047116240X
X7: Predicting program behavior using real or estimated profiles, David Wall
X8: Predicting conditional branch directions from previous runs of a program, Fisher, J. A. and Freudenberger, S. M.
X9: P Ephemeral Instrumentation for Lightweight Program Profiling, Traub, et al.

P10: Continuous Profiling: Where have all the cycles gone?, Anderson, et al.

P11: ProfileMe: Hardware Support for Instruction-Level Profiling on Out-of-Order Processors, Dean, et al.

P12: Focusing Processor Policies via Critical-Path Prediction, Fields, et al.
X10: Using Interaction Cost for Microarchitectural Bottleneck Analysis, Fields, et al.

P13: Automatically Characterizing Large Scale Program Behavior,
X11: Managing multi-configuration hardware via dynamic working set analysis, Dhodapkar and Smith.

Hardware Support for Dynamic Optimization:

X12: The Technology behind Crusoe Processors, Klaiber.
X13: The Transmeta Code Morphing Software: Using Speculation, Recovery, and Adaptive Retranslation to Address Real-Life Challenges, Dehnert, et al.
X14: DAISY: Dynamic Compilation for 100% Architectural Compatibility

P14: Performance Characterization of a Hardware Framework for Dynamic Optimization, Fahs, et al.

P15: Master/Slave Speculative Parallelization, Zilles and Sohi.

System Virtualization:

P16: Formal Requirements for Virtualizable Third Generation Architectures, Popek and Goldberg.

P17: Virtualizing I/O devices on VMware workstation's hosted virtual machine monitorsections 1,2,3.3, 4 and 6, Sugerman, Venkitachalam, and Lim.

P17: Intel virtualization technology, Uhlig, et al.